Non-volatile memory device and method of operating the same
US7679960B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2007 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Mar 15, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A highly integrated non-volatile memory device and a method of operating the non-volatile memory device are provided. The non-volatile memory device includes a semiconductor layer. A plurality of upper control gate electrodes are arranged above the semiconductor layer. A plurality of lower control gate electrodes are arranged below the semiconductor layer, and the plurality of upper control gate electrodes and the plurality of lower control gate electrodes are disposed alternately. A plurality of upper charge storage layers are interposed between the semiconductor layer and the upper control gate electrodes. A plurality of lower charge storage layers are interposed between the semiconductor layer and the lower control gate electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.