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US7679973B2 · kind B2 · utility

5Cited by
12References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 26, 2008
Grant dateMar 16, 2010
Priority date
Expiry dateJul 26, 2028

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/30141
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A register file is often used within integrated circuitry to temporarily hold data. Sometimes this data needs to be retained within the register file for a period of time, such as when there is a stall operation. Conventional register files have utilized a hold multiplexor to perform such a stall operation. The multiplexor however inserts a delay that is undesirable in high performance integrated circuitry. The multiplexor is replaced with a tri-state inverter coupled to the global bit line of the register file, which minimizes this additional delay from the register file data access time.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.