Spread spectrum clock generator having an adjustable delay line
US7680173B2 · kind B2 · utility
1Cited by
8References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2006 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Oct 25, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2215/067
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A system and method are provided for performing a spread spectrum clock generation, where the system includes self-adjusting delay line configured to spread the spectrum of a fixed circuit using a fixed clock frequency and a delay circuit configured to generate an adjustment signal to the delay line by adding or subtracting an addition delay per cycle, therefore causing a shift in the output clock frequency, wherein the amount of shift is proportional to the rate of addition or subtraction of delay.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.