Power management of non-volatile memory systems
US7681057B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 7, 2007 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Dec 24, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for placing a non-volatile memory systems in one of a number of power-down modes in response to events being monitored are useful in reducing power consumption of the non-volatile memory system. The power-down modes provide for successively less functionality, thus providing for successively less power consumption. A non-volatile memory system thus can respond to the events to place the system in a mode that permits the desired operation or a desired response time for subsequent operations while seeking to minimize power consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.