Test device and method for testing stability of computer
US7681081B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Sep 15, 2006 |
| Grant date | Mar 16, 2010 |
| Priority date | — |
| Expiry date | Jul 29, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A test device is provided for testing stability of a computer when the computer is started up or shut down. The test device includes a monolithic chip and a switch module. The monolithic chip includes an input port and an output port. The input port receives a high level or a low level signal from the computer. A test control module is disposed in the monolithic chip. The switch module includes an input pin coupled to the output port of the monolithic chip and a pair of output pins corresponding to the input pin. The pair of output pins is connected to the computer, for controlling the computer to be started up or shut down. The input port of the monolithic chip is connected to the computer for detecting a state of the computer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.