Spatially aware drive strength dependent die size independent combinatorial spare cell insertion manner and related system and method
US7683403B2 · kind B2 · utility
6Cited by
1References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 28, 2008 |
| Grant date | Mar 23, 2010 |
| Priority date | — |
| Expiry date | Mar 28, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A design method for an integrated circuit adds spare cells in a System-on-Chip to allow for Engineering Change Orders (ECOs) to be performed at a later stage in the design. This method can be used to provide a second version of the chip having minimal alterations performed in a short cycle time. The spare cells can be divided into combinational and sequential cells. There is an optimum spread of combinational cells in the design for post placement repairs of the chip with just metal layer changes. The method takes into account the drive strength of the spare cells as the main factor in their placement on the chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.