Distributed built-in test and performance monitoring system for electronic surveillance
US7683842B1 · kind B1 · utility
37Cited by
3References
20Claims
0Family size
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Key dates
| Filing date | Mar 17, 2008 |
| Grant date | Mar 23, 2010 |
| Priority date | — |
| Expiry date | Sep 3, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W24/06
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A distributed test system for implementing enhanced BIT (Built-In-Test) within an ESM (Electronic Surveillance Monitoring) or RF receiver system. The distributed test system includes a system processor, a programmable RF source element or other comparable test signal generating arrangement, and switched path coupled elements and various measurement elements, each embedded at strategic locations within the ESM system so as to effect maximum path coverage and test benefit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.