Patent · US Active

Method and circuit for processing data in communication networks

US7684442B2 · kind B2 · utility

3Cited by

15References

18Claims

0Family size

Inventors

Andy P. Annadurai · Oakland, US
Chris Tsu · Saratoga, US
Feng Han · Shanghai, CN

Key dates

Filing date	Aug 30, 2006
Grant date	Mar 23, 2010
Priority date	—
Expiry date	Nov 19, 2027

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY10S370/907
WIPO fieldTelecommunications
WIPO sectorElectrical engineering

Abstract

A method and circuitry for detecting a pattern in received data such as the A1A2 boundary in a SONET frame after deserialization. Two consecutive pluralities of bytes of incoming data are stored and compared with the A1 and A2 values (or bit shifted versions of the A1 and A2 values) until the boundary is detected. The data are then bit shifted so that every byte on the bus is either A2 or A1. A new aligned data bus is then formed such that the last A1 bit occurs on the data bus for a given clock cycle and the first A2 bit occurs on the data bus during the next clock cycle.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.