Method for determining via/contact pattern density effect in via/contact etch rate
US7687303B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2005 |
| Grant date | Mar 30, 2010 |
| Priority date | — |
| Expiry date | Apr 26, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for determining an effect of via/contact pattern density in via/contact etch rate of a wafer includes determining a neutral etchant species number flux intersecting each via/contact mouth as a function of local layout characteristics and determining variations in the neutral etchant species flux number as a function of the via/contact pattern density in a wafer scale. The comparison of these number fluxes provides the capability to discriminate an underetched or an overetched via/contact from normal vias/contacts satisfying an etch tolerance criterion. Chip designers can modify the layout design to minimize via/contact failures. Chip manufacturers can modify the etching process to minimize via/contact failures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.