Patent · US Active

High-speed serial interface circuitry for programmable logic device integrated circuits

US7688106B1 · kind B1 · utility

4Cited by

6References

12Claims

0Family size

Assignee

Altera Corporation · US

Inventors

Sergey Shumarayev · Los Altos Hills, US
Thungoc M. Tran · San Jose, US
Simardeep Maangat · Sunnyvale, US
Wilson Wong · San Francisco, US

Key dates

Filing date	Feb 27, 2007
Grant date	Mar 30, 2010
Priority date	—
Expiry date	Feb 27, 2027

Classification

Technology area (CPC H)Electricity
CPC primaryH03K19/17744
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

High-speed serial interface (“HSSI”) transceiver circuitry (e.g., on a programmable logic device (“PLD”) integrated circuit) includes input buffer circuitry with adaptive equalization capability. The transceiver circuitry also includes an output driver, which may include pre-emphasis capability (preferably controllably settable). Selectively usable loop-back circuitry is provided for allowing the output signal of the input buffer to be applied substantially directly to the output driver. The loop-back circuitry may include a loop-back driver, which may be turned on substantially only when needed for loop-back operations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.