Semiconductor memory capable of testing a failure before programming a fuse circuit and method thereof
US7688659B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 27, 2008 |
| Grant date | Mar 30, 2010 |
| Priority date | — |
| Expiry date | Sep 18, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Each program circuit outputs an operating specification signal indicating a first or second operating specification according to a program state. Each specification changing circuit is set by a corresponding block selection signal and outputs an operating specification signal indicating a second operating specification. Each timing control circuit changes an output timing of a precharge control signal for a bit line according to the operating specification signal. By the operating specification signal from the specification changing circuit, a failure can be detected in each memory block before programming a program circuit. Thereafter, the failure can be relieved by the program circuit. The output timing of the precharge control signal can be set for each memory block by a block selection signal without wiring a dedicated signal line for setting each specification changing circuit. Accordingly, increase in chip size can be minimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.