Enhanced data rate receiver
US7688923B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 11, 2006 |
| Grant date | Mar 30, 2010 |
| Priority date | — |
| Expiry date | Nov 1, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0621
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A receiver having circuitry for generating first digitized samples from a received analog signal at a first sampling rate, e.g. an ADC. An interpolating filter is used to generate second digitized samples which are estimates of samples obtainable by sampling the received analog signal at a second sample rate lower than the first sampling rate, second digitized samples being output at the first sampling rate and including at least one unusable sample. A circuit is provided for generating a signal for controlling components of the receive path downstream of the interpolation filter to prevent processing of the unusable second digitized samples.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.