Method for reducing sensitivity modulation and lag in electronic imagers
US7688947B2 · kind B2 · utility
2Cited by
10References
35Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 17, 2006 |
| Grant date | Mar 30, 2010 |
| Priority date | — |
| Expiry date | Jul 25, 2027 |
Classification
- Technology area (CPC A)Human Necessities
- CPC primaryA61B6/032
- WIPO fieldMedical technology
- WIPO sectorInstruments
Abstract
A method for reducing gain and lag signals associated with trapped charges is described. Data is collected from a detector. A forward bias voltage is temporarily applied to the detector between collecting the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.