Polarity-insensitive signal detect circuit for use with any signal sequence
US7689122B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2005 |
| Grant date | Mar 30, 2010 |
| Priority date | — |
| Expiry date | Feb 28, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R19/16557
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A signal detect circuit includes a signal strength measuring differential output linear amplifier. A positive peak detection circuit is coupled to the positive output terminal of the linear amplifier and generates a signal that represents a peak magnitude of a signal received from the positive output terminal. Likewise, a negative peak detection circuit is coupled to the negative output terminal of the linear amplifier and generates a signal that represents a peak magnitude of a signal received from the negative output terminal. Upon power up of the signal detect circuit, a comparison circuit detects when the positive and negative peak signal magnitudes has both exceed respective values at least once. Once this occurs, the comparison circuit compares an interpolation of the positive peak signal and the negative peak signal with the value. If the interpolated signal falls below the value, the comparison circuit generates a signal representing that no signal is being received.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.