Patent · US Active

Method for implementing resets in two computers

US7689729B2 · kind B2 · utility

0Cited by
5References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 9, 2005
Grant dateMar 30, 2010
Priority date
Expiry dateJan 13, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F1/24
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and computer program for implementing a reset both in a master computer and a slave computer which are both connected to a shared data bus. To allow a different reset configuration of both computers even when the slave computer, in particular, has no possibility of an internal slave-reset configuration, the method provides that the slave computer is configured with a slave-reset configuration which is provided to the slave computer by the master computer, reset-configured beforehand, via the data bus.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.