Instruction stream control
US7689735B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2005 |
| Grant date | Mar 30, 2010 |
| Priority date | — |
| Expiry date | May 1, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3802
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interface requests instructions from a data store storing instructions of an application to be processed by a data processor, and receives and transmits the instructions to the data processor. The interface includes: an input that receives the instructions from the data store via at least one input bus; a buffer that stores received instructions; an output that outputs instructions to the data processing apparatus via the output bus; a control signal input that receives a control signal; and a buffer controller that controls the buffer to request an instruction subsequent to a previously received instruction within an instruction stream of the application from the data store in response to detection of no control signal on the control signal input and to detection of available buffer storage capacity. In response to a control signal received at the control signal input, the controller controls at least one of input and storage of instructions within the interface in order to seek to reduce instruction movement through the input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.