Processor comprising an integrated debugging interface controlled by the processing unit of the processor
US7689864B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2007 |
| Grant date | Mar 30, 2010 |
| Priority date | — |
| Expiry date | Apr 30, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3656
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The systems and methods disclosed relate to a processor comprising a processing unit and a debugging that which can be connected to an external emulator for debugging a program executed by the processor, the debugging interface including internal resources at least partially accessible to the external emulator. According to one embodiment, the debugging interface includes a selecting circuit for selecting an internal resource of the debugging interface, according to a reference supplied by the processing unit, and an access circuit that transfers a datum between the resource selected and a data field accessible by the processing unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.