Memory handling techniques to facilitate debugging
US7689868B2 · kind B2 · utility
1Cited by
4References
3Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 22, 2007 |
| Grant date | Mar 30, 2010 |
| Priority date | — |
| Expiry date | Aug 25, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3636
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for debugging includes interacting with a memory management component to force an interrupt upon access to one or more memory locations during software execution, and in response to the forced interrupt, saving information regarding the execution of the software, and interacting with the memory management component to disable the interrupt upon access to the one or more memory locations during software execution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.