Patent · US Active

System and method for handling write commands to prevent corrupted parity information in a storage array

US7689890B2 · kind B2 · utility

4Cited by
8References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 21, 2005
Grant dateMar 30, 2010
Priority date
Expiry dateSep 18, 2028

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/1076
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An architecture and method for executing write commands in a storage array is disclosed. The data strips of the data stripes of the storage array each include a parity check bit. The parity strip of each stripe includes a plurality of parity check bits, each of which is uniquely associated with one of the data strips of the stripes. The inclusion within each data stripe of parity bits associated with each data strip and the party strip provides a method for identifying a corrupted or degraded data condition that occurs as a result of a server failing fails during a write command.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.