Compiler apparatus and linker apparatus
US7689976B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2004 |
| Grant date | Mar 30, 2010 |
| Priority date | — |
| Expiry date | Feb 13, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/4442
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A compiler capable of increasing the hit rate of the cache memory is provided that targets a computer having a cache memory, and that converts a source program into an object program. The compiler causes a computer to analyze group information that is used for grouping data objects included in the source program, and places the data objects into groups based on a result of the analysis. The compiler also causes the computer to generate an object program based on a result of the grouping, where the object program does not allow data objects belonging to different groups to be laid out in any blocks with the same set number on the cache memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.