Method for conserving space in a circuit
US7690105B2 · kind B2 · utility
3Cited by
12References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 17, 2006 |
| Grant date | Apr 6, 2010 |
| Priority date | — |
| Expiry date | Sep 15, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/4913
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for conserving space in a circuit or on a printed circuit board by integrating a plurality of electronic components so that the plurality of electronic components collectively take up a smaller amount of space on a substrate than the plurality of electronic components would if the plurality of electronic components were not integrated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.