Semiconductor device
US7692241B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 15, 2008 |
| Grant date | Apr 6, 2010 |
| Priority date | — |
| Expiry date | May 15, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/108
Abstract
A semiconductor device includes a semiconductor substrate and a super junction structure on the substrate. The super junction structure is constructed with p-type and n-type column regions that are alternately arranged. A p-type channel layer is formed to a surface of the super junction structure. A trench gate structure is formed to the n-type column region. An n+-type source region is formed to a surface of the channel layer near the trench structure. A p+-type region is formed to the surface of the channel layer between adjacent n+-type source regions. A p-type body region is formed in the channel layer between adjacent trench gate structures and in contact with the p+-type region. Avalanche current is caused to flow from the body region to a source electrode via the p+-type region without passing through the n+-type source region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.