Methods and apparatus for enabling bus connectivity over a data network
US7694312B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2004 |
| Grant date | Apr 6, 2010 |
| Priority date | — |
| Expiry date | Nov 11, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/544
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for interconnecting peripherals, processor nodes, and hardware devices to a data network to produce a network bus providing OS functionality for managing hardware devices connected to the network bus involves defining a network bus driver at each of the processor nodes that couples hardware device drivers to a network hardware abstraction layer of the processor node. The network bus can be constructed to account for the hot-swappable nature of the hardware devices using a device monitoring function, and plug and play functionality for adding and, removing device driver instances. The network bus can be used to provide a distributed processing system by defining a shared memory space at each processor node. Distributed memory pages are provided with bus-network-wide unique memory addresses, and a distributed memory manager is added to ensure consistency of the distributed memory pages, and to provide a library of functions for user mode applications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.