Attachment of a QFN to a PCB
US7696594B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2005 |
| Grant date | Apr 13, 2010 |
| Priority date | — |
| Expiry date | Aug 4, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Methods and arrangements to attach a QFN to a PCB, systems which include a QFN attached to a PCB, and apparatuses for controlling the deposit of solder upon a PCB are disclosed. Embodiments include transformations, code, state machines or other logic to calculate a total area for the QFN IO pads. Embodiments may then determine a total area for the regions of solder applied to the PCB thermal pad to which the QFN thermal pad may be connected in dependence upon the calculated total area for the QFN IO pads. In some embodiments, the total area of the solder regions applied to the PCB thermal pad is approximately equal to the calculated total area for the QFN IO pads. In many embodiments, the number of regions of solder and the shape of the regions of solder is determined.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.