Process for manufacturing epitaxial wafers for integrated devices on a common compound semiconductor III-V wafer
US7700423B2 · kind B2 · utility
6Cited by
21References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2006 |
| Grant date | Apr 20, 2010 |
| Priority date | — |
| Expiry date | Jan 26, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/05
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating an epitaxial compound semiconductor III-V wafer suitable for the subsequent fabrication of at least two different types of integrated active devices (such as an HBT and a FET) on such wafer by providing a substrate; growing a first epitaxial structure on the substrate; and growing a second epitaxial structure on the first epitaxial structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.