Signal conditioning circuit, a comparator including such a conditioning circuit and a successive approximation converter including such a circuit
US7701256B2 · kind B2 · utility
5Cited by
3References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2007 |
| Grant date | Apr 20, 2010 |
| Priority date | — |
| Expiry date | Sep 19, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/46
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A signal conditioning circuit for a latching comparator comprising first and second transistors arranged in a long tail pair, the long tail pair having an active load and configured to act as an integrator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.