Method and apparatus for frequency discriminator and data demodulation in frequency lock loop of digital code division multiple access (CDMA) receivers
US7702040B1 · kind B1 · utility
8Cited by
7References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2006 |
| Grant date | Apr 20, 2010 |
| Priority date | — |
| Expiry date | Nov 8, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0069
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An embodiment and method of the present invention includes a frequency lock loop (FLL) having an improved frequency error estimation and a low bit error rate (BER) in data demodulation by calculating and using an improved averaged phase rotation using ‘valid’ phase rotation samples.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.