Patent · US Active

Systems and methods for generating erasure flags

US7702989B2 · kind B2 · utility

96Cited by
6References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 27, 2006
Grant dateApr 20, 2010
Priority date
Expiry dateOct 5, 2028

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2029/0411
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Various systems and methods for generating error indications are disclosed herein. In some cases, the error indication is used as an erasure pointer in a memory access system. As one particular example, a system for generating an erasure pointer is disclosed that includes accumulating a number of error values into an overall error value, and comparing the overall error value to an error threshold. When the overall error value exceeds the error threshold, an erasure pointer is generated. In one particular case, the error values are derived from a look up table using thermometer codes generated by an analog to digital converter. In other cases, the error values are derived from comparing a soft output with a reliability threshold.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.