Method of embedding tamper proof layers and discrete components into printed circuit board stack-up
US7703201B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2005 |
| Grant date | Apr 27, 2010 |
| Priority date | — |
| Expiry date | May 13, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49155
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for embedding tamper proof layers and discrete components into a printed circuit board stack-up is disclosed. According to this method, a plating mask is applied on a base substrate to cover partially one of its faces. Conductive ink is then spread on this face so as to fill the gap formed by the plating mask. To obtain a uniform distribution of the conductive ink and then gel it, the conductive ink is preferably heated. A dielectric layer is applied on the conductive ink layer and the polymerization process is ended to obtain a strong adhesion between these two layers. In a preferred embodiment, conductive tracks are simultaneously designed on the other face of the base substrate to reduce thermo-mechanical strains and deformations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.