Electrostatic discharge protection device and layout thereof

US7705404B2 · kind B2 · utility

Assignee

• AMAZING MICROELECTRONIC CORP. · TW

Inventors

• Ming-Dou Ker · Hsinchu, TW
• Jia-Huei Chen · Taichung, TW
• Ryan Hsin-Chin Jiang · Taipei, TW

Key dates

• Filing date: Dec 20, 2006
• Grant date: Apr 27, 2010
• Expiry date: Feb 24, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002

Abstract

An electrostatic discharge (ESD) protection device and a layout thereof are provided. A bias conducting wire is mainly used to couple each base of a plurality of parasitic transistors inside ESD elements together, in order to simultaneously trigger all the parasitic transistors to bypass the ESD current, avoid the elements of a core circuit being damaged, and solve the non-uniform problem of bypassing the ESD current when ESD occurs. Furthermore, in the ESD protection layout, it only needs to add another doped region on a substrate neighboring to, but not contacting, doped regions of the ESD protection elements and use contacts to connect the added doped region, so as to couple each base of the parasitic transistors together without requiring for additional layout area.