Patent · US Active

Circuitry and method

US7705410B2 · kind B2 · utility

0Cited by
12References
47Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 31, 2007
Grant dateApr 27, 2010
Priority date
Expiry dateJun 25, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10K85/1135
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A circuitry for differential amplifying, logical inversion, NAND and/or NOR operations is provided, which includes at least one depletion mode transistor having JFET characteristics. A method for determining the properties of an electrochemical circuitry is provided, including at least one semi-finished transistor, by applying a solidified electrolyte to selected sets of electrochemically active transistor elements is also provided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.