Power regulator circuitry with power-on-reset control
US7705659B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 2, 2007 |
| Grant date | Apr 27, 2010 |
| Priority date | — |
| Expiry date | Jan 17, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/417
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Power regulator circuitry is provided for powering loads such as memory element arrays on integrated circuits. The power regulator circuitry may have a regulated power supply circuit and a switch-based power supply circuit. Control circuitry can control the regulated power supply circuit and the switch-based power supply circuit. The control circuitry may include a power supply power-on-reset control circuit. The power supply power-on-reset control circuit may receive a system power-on-reset control signal from a system power-on-reset control circuit. Based on the system power-on-reset control signal and monitored power supply voltages, the power supply power-on-reset control circuit may apply power-on-reset control signals to depletion mode transistors in the power regulator circuitry to ensure that nodes within the power regulator circuitry have defined values during power-up operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.