Transistor and routing layout for a radio frequency integrated CMOS power amplifier device
US7705684B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2008 |
| Grant date | Apr 27, 2010 |
| Priority date | — |
| Expiry date | Jul 12, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45464
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated CMOS power amplifier system to improve amplifier performance, the integrated CMOS power amplifier system including a plurality of differential main amplifier cores, a plurality of ground pads, and a plurality of routes to connect the plurality of differential main amplifier cores to the plurality of ground pads. Each differential main amplifier core includes a pair of collocated main amplifier core transistors. Each ground pad is connected to a subset of the differential main amplifier cores. Embodiments of the integrated CMOS power amplifier system decrease parasitic inductance to ground and increase the transconductance and amplification of the integrated CMOS power amplifier system, thus improving performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.