Gain matching method and system for single bit gain ranging analog-to-digital converter
US7705757B2 · kind B2 · utility
1Cited by
19References
25Claims
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Key dates
| Filing date | Nov 30, 2007 |
| Grant date | Apr 27, 2010 |
| Priority date | — |
| Expiry date | Dec 13, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/434
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A gain matching method for a single bit gain ranging analog to digital converter including selecting, in response to a gain setting, a number of gain elements to be enabled in a multi-element gain controlled array interconnected between an analog input and an analog to digital converter, and patterning the enablement of the selected number of gain elements among the gain elements for matching the gain of the analog to digital converter for a range of gain settings of the converter to reduce in-band gain error due to gain element mismatch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.