Storage area network (SAN) switch multi-pass erase of data on target devices
US7707371B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2007 |
| Grant date | Apr 27, 2010 |
| Priority date | — |
| Expiry date | Oct 9, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2143
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are provided for performing multi-pass erase. An erase command is received at a storage area network (SAN) switch in a storage area network. The erase command is associated with a block of data on a target device. A virtual initiator is determined for performing the erase command on the block of data. Multiple bit patterns are generated using a multi-pass erase algorithm. The multiple bit patterns are generated for writing over the block of data on the target device. Repeated writes are performed over the block of data using the bit patterns. The block of data is repeatedly overwritten to remove remanence of the block of data on the target device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.