Semiconductor device and method of manufacturing the same
US7709319B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2006 |
| Grant date | May 4, 2010 |
| Priority date | — |
| Expiry date | Jun 12, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/033
Abstract
Provided is a semiconductor device including a vertically oriented capacitor extending above the substrate surface and a method of manufacturing such devices in which cell, peripheral and boundary areas between the cell and peripheral areas are defined on a semiconductor substrate. Capacitors are formed in the cell area, a mold pattern is provided in the peripheral areas and an elongated dummy pattern is provided in the boundary areas. The dummy pattern includes a boundary opening in which a thin layer is formed on the elongated inner sidewalls and on the exposed portion of the substrate during formation of the lower electrode. A mold pattern and lower electrode structures having substantially the same height are then formed area so that subsequent insulation interlayer(s) exhibit a generally planar surface, i.e., have no significant step difference between the cell areas and the peripheral areas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.