Pixel structure and fabrication method thereof
US7709850B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 8, 2006 |
| Grant date | May 4, 2010 |
| Priority date | — |
| Expiry date | Oct 19, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
A pixel structure and a fabrication method thereof are provided. The pixel comprises a substrate, a gate, a gate insulating layer, a channel layer, a first source/drain, a second source/drain, a dielectric layer, a first pixel electrode, and a second pixel electrode. The gate is disposed on the substrate and is covered by the gate insulating layer. The channel layer is disposed on the gate insulating layer above the gate. The first source/drain and the second source/drain are disposed on the channel layer. The channel layer has different thicknesses respectively corresponding to the first drain/source and the second drain/source. The dielectric layer covers the substrate and exposes the first and the second drains. The first and the second pixel electrodes are disposed on the dielectric layer, and are electrically connected to the first and the second drains respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.