Segmented data shuffler apparatus for a digital to analog converter (DAC)
US7710300B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 17, 2008 |
| Grant date | May 4, 2010 |
| Priority date | — |
| Expiry date | Apr 17, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/3026
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A sigma-delta digital to analog converter (DAC) module converts the digital input signal to the analog output signal through segmentation, including a primary and a secondary sigma-delta modulator. The primary sigma-delta modulator produces a primary digital segment and a primary quantization error. A primary sample is delayed, decoded, scrambled and converted to produce a primary analog segment. A secondary sigma-delta modulates the primary quantization error to produce a secondary digital segment which is noise shaped by a noise transfer function of the primary sigma-delta modulator to produce a noise shaped secondary digital segment which is decoded, scrambled, converted and scaled to produce a secondary analog segment. An adder combines the primary analog segment and the secondary analog segment to produce the analog output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.