Display and method of driving same
US7710376B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 2006 |
| Grant date | May 4, 2010 |
| Priority date | — |
| Expiry date | Mar 6, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0247
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display with low power consumption using a memory-incorporated pixel system capable of refreshing the image signal memory and updating an image without causing a flicker. Each pixel arranged in matrix has, at an intersection between the signal line and the scan line, a first transistor and a second transistor to drive the electrooptical medium. The second transistor has its gate connected with the image signal memory which in turn is connected to the reference voltage line. There is a parasitic capacitor between the gate of the second transistor and the scan line. The gate of the second transistor is also connected with an added capacitor. Further, the second transistor is connected with a holding capacitor and also has a parasitic capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.