Method for on chip sensing of SONOS VT window in non-volatile static random access memory
US7710776B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2006 |
| Grant date | May 4, 2010 |
| Priority date | — |
| Expiry date | Dec 27, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for determining a SONOS VT window using a current sensing scheme is disclosed. The present invention creates a first current path and a second current path through the volatile and non-volatile sections of an nvSRAM memory cell. The erase threshold voltage of the first edge of the window is determined when current is detected in the first path. The program voltage of the second edge of the window is determined when current is detected in the second path. Accordingly, the voltage used to power a plurality of SONOS transistors may be set using the values of the first and second threshold edges to determine the VT window.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.