Method and system for tracking instruction dependency in an out-of-order processor
US7711929B2 · kind B2 · utility
58Cited by
5References
19Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 30, 2007 |
| Grant date | May 4, 2010 |
| Priority date | — |
| Expiry date | Oct 21, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3863
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of tracking instruction dependency in a processor issuing instructions speculatively includes recording in an instruction dependency array (IDA) an entry for each instruction that indicates data dependencies, if any, upon other active instructions. An output vector read out from the IDA indicates data readiness based upon which instructions have previously been selected for issue. The output vector is used to select and read out issue-ready instructions from an instruction buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.