Method and device for performing offset cancellation in an amplifier using floating-gate transistors
US7714650B2 · kind B2 · utility
1Cited by
5References
9Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 30, 2006 |
| Grant date | May 11, 2010 |
| Priority date | — |
| Expiry date | Aug 15, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45681
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An operational amplifier including: a differential pair of transistors coupled to a pair of input signals; and a pair of floating-gate transistors coupled to the differential pair of transistors, wherein the pair of floating-gate transistors are operable for reducing an offset voltage of the operational amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.