Chopper-stabilized analog-to-digital converter
US7714757B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2007 |
| Grant date | May 11, 2010 |
| Priority date | — |
| Expiry date | Sep 26, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/39
- WIPO fieldMedical technology
- WIPO sectorInstruments
Abstract
This disclosure describes a chopper-stabilized sigma-delta analog-to-digital converter (ADC). The ADC is configured to provide accurate output at low frequency with relatively low power. The chopper-stabilized ADC substantially reduces or eliminates noise and offset from an output signal produced by the mixer amplifier. Dynamic limitations, i.e., glitching that result from chopper stabilization at low power are substantially eliminated or reduced through a combination of chopping at low impedance nodes within the mixer amplifier and feedback. The signal path of the ADC operates as a continuous time system, providing minimal aliasing of noise or external signals entering the signal pathway at the chop frequency or its harmonics. In this manner, the chopper-stabilized ADC can be used in a low power system, such as an implantable medical device (IMD), to provide a stable, low-noise output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.