Method and apparatus for reducing non-montonic regions in a digitally controlled oscillator
US7715515B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2006 |
| Grant date | May 11, 2010 |
| Priority date | — |
| Expiry date | Mar 11, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0991
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The control word input to a Digitally Controlled Oscillator (DCO) is modified to reduce non-monotonic regions in the output response of the DCO. The DCO may be included in a Phase-Locked Loop (PLL) circuit for generating an output signal that locks onto either the phase or frequency of a reference signal input. By modifying the control word input to the DCO to avoid non-monotonic regions in the DCO output response, PLL phase noise is reduced. In one embodiment, the control word is modified by reordering or skipping control word values input to the DCO that correspond to non-monotonic regions in the output response of the DCO circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.