Register exchange network for radix-4 SOVA (Soft-Output Viterbi Algorithm)
US7716564B2 · kind B2 · utility
5Cited by
9References
20Claims
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Key dates
| Filing date | Sep 25, 2007 |
| Grant date | May 11, 2010 |
| Priority date | — |
| Expiry date | Jul 2, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/4146
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Register exchange network for radix-4 SOVA (Soft-Output Viterbi Algorithm). Two trellis stages are processed simultaneously and in parallel with one another (e.g., during a single clock cycle) thereby significantly increasing data throughput. Any one or more modules within an REX (Register Exchange) module are implemented using a radix-4 architecture to increase data throughput. Any one or more of a SMU (Survivor Memory Unit), a PED (Path Equivalency Detector), and a RMU (Reliability Measure Unit) are implemented in accordance with the principles of radix-4 decoding processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.