Wafer level package for very small footprint and low profile white LED devices
US7718449B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2006 |
| Grant date | May 18, 2010 |
| Priority date | — |
| Expiry date | Sep 30, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/8514
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A surface mount LED package having a tight footprint and small vertical image size is fabricated by a method comprising: forming light emitting diode chips each having a substrate and a plurality of layers configured to emit electroluminescence responsive to electrical energizing; forming electrical vias in a sub mount, the electrical vias passing from a front side of the sub-mount to a back-side of the sub-mount; flip chip bonding the light emitting diode chips on the front-side of the sub mount such that each light emitting diode chip electrically contacts selected electrical vias; thinning or removing the substrates of the flip-chip bonded light emitting diode chips; and after the thinning, disposing a phosphor over the flip chip bonded light emitting diode chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.