Performance improvements of OFETs through use of field oxide to control ink flow
US7718466B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2008 |
| Grant date | May 18, 2010 |
| Priority date | — |
| Expiry date | Jul 11, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K10/471
Abstract
An OFET includes a thick dielectric layer with openings in the active region of a transistor. After the field dielectric layer is formed, semiconductor ink is dropped in the active region cavities in the field dielectric layer, forming the semiconductor layer. The ink is bounded by the field dielectric layer walls. After the semiconductor layer is annealed, dielectric ink is dropped into the same cavities. As with the semiconductor ink, the field dielectric wall confines the flow of the dielectric ink. The confined flow causes the dielectric ink to pool into the cavity, forming a uniform layer within the cavity, and thereby decreasing the probability of pinhole shorting. After the dielectric is annealed, a gate layer covers the active region thereby completing a high performance OFET structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.