Bus receiver and method of deskewing bus signals
US7721137B2 · kind B2 · utility
7Cited by
2References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2006 |
| Grant date | May 18, 2010 |
| Priority date | — |
| Expiry date | Oct 23, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bus receiver receives at least one first signal and a second signal both generated from a chip connected to a parallel bus. The bus receiver includes a receiving module and a deskewing module. The receiving module is electrically connected to the parallel bus and receives the first signal and the second signal transmitted through the parallel bus. The deskewing module is electrically connected to the receiving module and deskews the phase of the first signal and the phase of the second signal. The first signal and the second signal are in the same phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.