Patent · US Active

Method for verifying redundancy of secure systems

US7721149B2 · kind B2 · utility

7Cited by
8References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 15, 2006
Grant dateMay 18, 2010
Priority date
Expiry dateOct 11, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/1654
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A secure system has two computers that are intrinsically safe and implements a method for verifying the redundancy for the outputs where a very high level of safety is required. The method makes it possible to handle inconsistencies in the outputs of the two computers when they are working in redundant mode. Each computer receives the output states determined by the other computer and compares them to states calculated. A state of divergent operation is detected if the computers have determined two different states for a single output. If a divergence is detected for at least one output, the state of that output is determined by preventing any transition from a restrictive state to a permissive state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.