Patent · US Active

Method and system for allowing code to be securely initialized in a computer

US7721341B2 · kind B2 · utility

9Cited by
108References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 15, 2005
Grant dateMay 18, 2010
Priority date
Expiry dateJan 21, 2028

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F21/575
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory controller prevents CPUs and other I/O bus masters from accessing memory during a code (for example, trusted core) initialization process. The memory controller resets CPUs in the computer and allows a CPU to begin accessing memory at a particular location (identified to the CPU by the memory controller). Once an initialization process has been executed by that CPU, the code is operational and any other CPUs are allowed to access memory (after being reset), as are any other bus masters (subject to any controls imposed by the initiated code).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.